12 sii eeprom interface (i²c), 1 signals, 2 eeprom emulation – BECKHOFF EtherCAT IP Core for Altera FPGAs v3.0.10 User Manual
Page 135: 3 timing specifications, Sii eeprom interface (i²c), Signals, Eeprom emulation, Timing specifications, Table 63: i²c eeprom signals, Table 64: eeprom timing characteristics ip core
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12 sii eeprom interface (i²c), 1 signals, 2 eeprom emulation | 3 timing specifications, Sii eeprom interface (i²c), Signals, Eeprom emulation, Timing specifications, Table 63: i²c eeprom signals, Table 64: eeprom timing characteristics ip core | BECKHOFF EtherCAT IP Core for Altera FPGAs v3.0.10 User Manual | Page 135 / 141
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