Figure 58: plb read access, Figure 59: plb write access – BECKHOFF EtherCAT IP Core for Xilinx FPGAs v3.00k User Manual

Figure 58: plb read access, Figure 59: plb write access | BECKHOFF EtherCAT IP Core for Xilinx FPGAs v3.00k User Manual | Page 132 / 144