3 µcontroller configuration (8/16bit), Figure 20: register pdi, Μc-configuration – BECKHOFF EtherCAT IP Core for Xilinx FPGAs v3.00k User Manual

3 µcontroller configuration (8/16bit), Figure 20: register pdi, Μc-configuration | BECKHOFF EtherCAT IP Core for Xilinx FPGAs v3.00k User Manual | Page 57 / 144