Advanced chipset settings, Configure dram timing by spd, Bios setup 36 – IBASE MI889 User Manual

Page 40: Mi889 user’s manual

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BIOS SETUP

36

MI889 User’s Manual

Advanced Chipset Settings

This setting configures the north bridge and south bridge settings.
WARNING! Setting the wrong values may cause the system to
malfunction.

BIOS SETUP UTILITY

Main Advanced PCIPnP Boot

Security

Chipset

Exit

Advanced Chipset Settings

Configure North Bridge
features.


<- Select

Screen

↑↓ Select

Item

Enter

Go to Sub Screen

F1 General

Help

F10 Save and Exit
ESC Exit

WARNING: Setting wrong values in below sections

may cause system to malfunction.

North Bridge Configuration

South Bridge Configuration

BIOS SETUP UTILITY

Chipset

North Bridge Chipset Configuration

Options

Enabled
Disabled

<- Select

Screen

↑↓ Select

Item

+- Change Option
F1 General

Help

F10 Save and Exit
ESC Exit

PCI MMIO Allocation: 4GB To 3072MB

Configure DRAM Timing by SPD [Enabled]

Initiate Graphics Adapter

[IGD]

Internal Graphics Mode Select [Enabled, 8MB]

PEG Port Configuration


► Video Function Configuration

Configure DRAM Timing by SPD

When this item is enabled, the DRAM timing parameters are set according to the
DRAM SPD (Serial Presence Detect). When disabled, you can manually set the
DRAM timing parameters through the DRAM sub-items.

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