Register – Texas Instruments TVP5154EVM User Manual
Page 31
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Quad 1
Quad 2
Quad 3
Quad 4
Programming the TMS320DM642
Capture Enable
Bit 3
Disable (default)
0
Enable
1
Position
Bit 5
Bit 4
Quadrant 1
0
0
Quadrant 2
0
1
Quadrant 3
1
0
Quadrant 4 (default)
1
1
Table 14. Decoder 1 Input Format Register
Address
04h
Default
01h
7
6
5
4
3
2
1
0
Reserved
Input Color Standard
Input Color Standard
Bit 2
Bit 1
Bit 0
NTSC
0
0
0
(B, D, G, H, I, N) PAL
0
0
1
(default)
Reserved
. . .
The Input Color Standard register is used to inform the DM642 of the input color standard for that given
decoder (1–4). The output format of the DM642 is set to the standard with the largest majority based on
Registers 04h–07h. If the number of input color standards is equal, the DM642 automatically default to
PAL output.
Table 15. Decoder 2 Input Format Register
Address
05h
Default
01h
7
6
5
4
3
2
1
0
Reserved
Input Color Standard
Input Color Standard
Bit 2
Bit 1
Bit 0
NTSC
0
0
0
(B, D, G, H, I, N) PAL
0
0
1
(default)
Reserved
. . .
SLEU069A – February 2006 – Revised July 2006
TVP5154EVM User's Guide
31