Micromod Micro-DCI: 53SL6000 Single Loop Controller - Manual (Page 41)

5. Discrete Input Logic Blocks - two input logic
blocks permit discrete input signals to be event
gated with internal controller signals according
to any one of eight specified logic functions.
The eight logic functions are as follows:
•
A OR B
•
A AND B
•
A XOR B
•
A OR NOT B
•
A AND NOT B
•
NOT A OR B
•
NOT A AND B
•
NOT A XOR B
6. Control Scheme Block - five selectable control
scheme applications that calculate and pro-
duce the necessary control output signal for
the process. The five control schemes are as
follows:
•
SnGL - Single Loop
•
cASc - Single Station Cascade
•
L.LiM - Low Limiter (High Override)
•
h.LiM - High Limiter (Low Override)
•
in.Ld - Indicator/Loader
7. Discrete Output Logic Blocks - two output logic
blocks that permit internal controller signals to
be event gated according to any one of eight
specified logic functions (see item 5, Discrete
Input Logic Blocks for functions).
8. Analog Output - there are three analog output
registers, AO1-AO3. Analog output 1 (AO1) is
associated with the standard 0-100 output
value that produces a 0/4-20 mA signal to drive
the final control element or is applied as input
to another controller. Analog output registers
AO2 and AO3 do not provide external signals,
but serve as a loop-back to the math function
block and control scheme block (the loop-back
path is not shown in the illustration).
9. Discrete Outputs 1-4 (DO1-4) - there are eight
digital output registers, DO1-DO8. DO1 and
DO2 provide outputs that may be used to acti-
vate pumps, alarms, etc. Discrete outputs 3
and 4 require the 2DI/2DO module, which pro-
vides relay outputs capable of higher current
loads than DO1 and DO2. DO3 and DO4 are
generally sufficient as the two driver outputs
for time proportional or three step output driv-
ers, which are digital outputs used instead of
the continuous 0/4-20 mA signal. Digital out-
put registers DO5-DO8 have no associated
hardware, but DO7 and DO8 serve as loop-
back registers to the math function block or
input logic blocks (the loop-back path is not
shown in the illustration).
4.2 Detailed Block Diagram
A more detailed functional block diagram of the
controller is illustrated in Figure 4-2. The illustra-
tion depicts processing as divided into analog con-
trol (upper half) and discrete digital control (lower
half). The nine major functional areas are pre-
sented with an emphasis on the available input
path selections. Additional information for each of
the nine functional areas is provided in Sections 5
through 7.
1. Analog Inputs 1-8 (AI1-8) - the two standard
(AI1 and AI2) and two optional inputs (AI3 and
AI4) are identified. The push buttons next to
AI7 and AI8 represent operator access to
these registers via the oPEr menu. Access to
these registers must be enabled with the conF-
oPr-Ai.E parameter; otherwise, they will not
appear in the oPEr prompt list.
2. Discrete Inputs 1-8 (DI1-8) - the two standard
(DI1 and DI2) and two optional inputs (DI3 and
DI4) are identified. Each DI register has two
outputs; one of the outputs is inverted and is
indicated with a slash (/) across the connection
T-bar. The push buttons next to DI7 and DI8
represent operator access to these registers
via the oPEr menu. Access to these registers
must be enabled from the conF-oPr-di7.E and
conF-oPr-di8.E parameters; otherwise, they
will not appear in the oPEr prompt list.
3. Characterizer - is depicted as a five pin plug-
able element, which can be inserted into one of
the track locations of the math function block or
control scheme block. It intercepts the signal
value before the math function block or control
scheme and augments that value as deter-
mined by the selected operating mode (except
for the programmer mode, which generates an
independent signal based on time and config-
ured data). The characterizer output is applied
to the math function block or control scheme
block. The intercept selections Fnc.A through
cS.F are from the ProG-cS-chrA list. As shown
in the illustration, the chr.A Fnc.A - Fnc.d se-
lections are path connections to the math func-
tion block inputs A-D and the cS.A - cS.F
53SL6000 Instruction Manual Section 4. Functional Overview
4-2
FUNC