Cirrus Logic CS4353 User Manual
3 v stereo audio dac with 2 v, Line output, Cs4353
Copyright
Cirrus Logic, Inc. 2011
(All Rights Reserved)
3.3 V Stereo Audio DAC with 2 V
RMS
Line Output
Features
Multi-bit Delta-Sigma Modulator
106 dB A-weighted Dynamic Range
-93 dB THD+N
Single-ended Ground Centered Analog
Architecture
–
No DC-blocking Capacitors Required
–
Integrated Step-up/Inverting Charge Pump
–
Filtered Line-level Outputs
–
Selectable 1 or 2 V
RMS
Full-scale Output
Low Clock-jitter Sensitivity
Low-latency Digital Filtering
Supports Sample Rates up to 192 kHz
24-bit Resolution
+3.3 V Charge Pump and Core Logic, +3.3 V
Analog, and +0.9 to 3.3 V Interface Power
Supplies
Low Power Consumption
24-pin QFN, Lead-free Assembly
Description
The CS4353 is a complete stereo digital-to-analog sys-
tem including digital interpolation, fifth-order multi-bit
delta-sigma digital-to-analog conversion, digital de-em-
phasis, analog filtering, and on-chip 2 V
RMS
line-level
driver from a 3.3 V supply.
The advantages of this architecture include ideal differ-
ential linearity, no distortion mechanisms due to resistor
matching errors, no linearity drift over time and temper-
ature, high tolerance to clock jitter, and a minimal set of
external components.
The CS4353 is available in a 24-pin QFN package in
Commercial (-40°C to +85°C) grade. The CDB4353
Customer Demonstration Board is also available for de-
vice evaluation and implementation suggestions.
Please see
“Ordering Information” on page 25
for com-
plete details.
These features are ideal for cost-sensitive, 2-channel
audio systems including video game consoles, DVD
players and recorders, A/V receivers, set-top boxes,
digital TVs, mini-component systems, and mixing
consoles.
PCM Serial
Audio Port
L
e
ve
l Sh
if
te
r
Serial
Audio
Input
Multibit
Modulator
Interpolation
Filters
Digital Core Logic and
Charge Pump Supply (VCP)
+3.3 V
Left Channel
Right Channel
Hardware
Control
Power-On
Reset
Hardware
Control
Reset
Auto Speed
Mode Detect
Analog Supply (VA)
+3.3 V
Inverting
Step-Up
+VA_H
-VA_H
Interface Supply (VL)
+0.9 V to +3.3 V
Ground-Centered,
2 Vrms Line Level Outputs
DAC
Pseudo Diff. Input
MAY ‘11
DS803F3
CS4353
Document Outline
- 1. Pin Descriptions
- 2. Characteristics and Specifications
- Recommended Operating Conditions
- Absolute Maximum Ratings
- DAC Analog Characteristics
- Combined Interpolation & On-Chip Analog Filter Response
- Switching Specifications - Serial Audio Interface
- Digital Interface Characteristics
- Internal Power-on Reset Threshold Voltages
- DC Electrical Characteristics
- 2.1 Digital I/O Pin Characteristics
- 3. Typical Connection Diagram
- 4. Applications
- 4.1 Line Outputs
- 4.2 Sample Rate Range/Operational Mode Detect
- 4.3 System Clocking
- 4.4 Digital Interface Format
- 4.5 Internal High-Pass Filter
- 4.6 De-emphasis Control
- 4.7 Internal Power-on Reset
- 4.8 Initialization
- 4.9 Recommended Power-up and Power-down Sequences
- 4.10 Grounding and Power Supply Arrangements
- 5. Digital Filter Response Plots
- Figure 10. Single-speed Stopband Rejection
- Figure 11. Single-speed Transition Band
- Figure 12. Single-speed Transition Band (detail)
- Figure 13. Single-speed Passband Ripple
- Figure 14. Double-speed Stopband Rejection
- Figure 15. Double-speed Transition Band
- Figure 16. Double-speed Transition Band (detail)
- Figure 17. Double-speed Passband Ripple
- Figure 18. Quad-speed Stopband Rejection
- Figure 19. Quad-speed Transition Band
- Figure 20. Quad-speed Transition Band (detail)
- Figure 21. Quad-speed Passband Ripple
- 6. Parameter Definitions
- 7. Package Dimensions
- 8. Ordering Information
- 9. Revision History