ADLINK PCI-7300A - Manual (Page 6)

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• Table of Contents
4.3 D
IGITAL
I/O D
ATA
F
LOW
.............................................................................28
4.4 I NPUT FIFO AND O UTPUT FIFO ................................................................29
4.5 B
US
-
MASTERING
DMA ...............................................................................30
4.6 S
CATTER
/
GATHER
DMA .............................................................................31
4.7 C LOCKING M ODE ........................................................................................32
4.8 S
TARTING
M
ODE
.........................................................................................33
4.9 A
CTIVE
T
ERMINATOR
..................................................................................34
4.10 D IGITAL I NPUT O PERATION M ODE .............................................................34
4.10.1 Digital Input DMA in Internal Clock Mode............................34
4.10.2 Digital Input DMA in External Clock Mode...........................36
4.10.3 Digital Input DMA in Handshaking Mode.............................38
4.10.4 Continuous Digital Input..........................................................40
4.11 D
IGITAL
O
UTPUT
O
PERATION
M
ODE
.........................................................41
4.11.1 Digital Output DMA in Internal Clock Mode.........................41
4.11.2 Digital Output DMA in Handshaking Mode..........................42
4.11.3 Digital Output DMA in Burst Handshaking Mode ...............44
4.11.4 Pattern Generator....................................................................45
4.12 A
UXILIARY
DIO ..........................................................................................46
C/C++ Libraries.......................................................................47
5.1 L
IBRARIES
I
NSTALLATION
............................................................................47
5.2 P
ROGRAMMING
G
UIDE
................................................................................48
5.2.1 Naming Convention.................................................................48
5.2.2 Data Types................................................................................48
5.3 _7300_I
NITIAL
............................................................................................49
5.4 _7300_C
LOSE
...........................................................................................50
5.5 _7300_C ONFIGURE ...................................................................................50
5.6 _7300_DI_M
ODE
......................................................................................52
5.7 _7300_DO_M
ODE
....................................................................................53
5.8 _7300_AUX_DI........................................................................................54
5.9 _7300_AUX_DI_C
HANNEL
......................................................................54
5.10 _7300_AUX_DO.....................................................................................55
5.11 _7300_AUX_DO_C HANNEL ....................................................................55
5.12 _7300_A
LLOC
_DMA_M
EM
......................................................................56
5.13 _7300_F
REE
_DMA_M
E M
........................................................................57
5.14 _7300_DI_DMA_S TART ..........................................................................57
5.15 _7300_DI_DMA_S
TATUS
........................................................................60
5.16 _7300_DI_DMA_A
BORT
.........................................................................60
5.17 _7300_G ET O VERRUN S TATUS ..................................................................61
5.18 _7300_DO_DMA_S
TART
........................................................................61