Altera Cyclone V E FPGA - Manual (Page 31)

December 2014 Altera Corporation Cyclone V E FPGA Development Kit
User Guide
A. Programming the Flash Memory
Device
As you develop your own project using the Altera tools, you can program the flash
memory device so that your own design loads from flash memory into the FPGA on
power up. This appendix describes the preprogrammed contents of the common flash
interface (CFI) flash memory device on the Cyclone V E FPGA development board
and the Nios II EDS tools involved with reprogramming the user portions of the flash
memory device.
The Cyclone V E FPGA development board ships with the CFI flash device
preprogrammed with a default factory FPGA configuration for running the Board
Update Portal design example and a default user configuration for running the Board
Test System demonstration. There are several other factory software files written to
the CFI flash device to support the Board Update Portal. These software files were
created using the Nios II EDS, just as the hardware design was created using the
Quartus II software.
f
For more information about Altera development tools, refer to the Design Software
page of the Altera website.
CFI Flash Memory Map
Table A–1 shows the default memory contents of the 512-Mb CFI flash device. For the
Board Update Portal to run correctly and update designs in the user memory, this
memory map must not be altered.
c
Altera recommends that you do not overwrite the factory hardware and factory
software images unless you are an expert with the Altera tools. If you unintentionally
overwrite the factory hardware or factory software image, refer to
“Restoring the
Flash Device to the Factory Settings” on page A–4 .
Table A–1. Byte Address Flash Memory Map
Block Description KB Size Address Range
Board Test System Scratch 128 0x03FE.0000 - 03FF.FFFF
User software 28,800 0x023C.0000 - 03FD.FFFF
Factory software 8192 0x01BC.0000 - 023B.FFFF
Zipfs (html, web content) 4096 0x017C.0000 - 01BB.FFFF
User hardware 2 8064 0x00FE.0000 - 017B.FFFF
User hardware 1 8064 0x0080.0000 - 00FD.FFFF
Factory hardware 8064 0x0002.0000 - 007F.FFFF
PFL option bits 32 0x0001.8000 - 0001.FFFF
Board information 16 0x0001.4000 - 0001.7FFF
Ethernet option bits 2 32 0x0000.C000 - 0001.3FFF
Ethernet option bits 1 32 0x0000.4000 - 0000.BFFF
User design reset vector 16 0x0000.0000 - 0000.3FFF