Sundance SMT300Q v.1.6 User Manual
Page 4
Page 4 of 61
SMT300Q SMT300Q User Guide V1.65
14.3.4
Local Bus Interrupt Status Register(Offset 0x76, BAR0) ............................................ 45
14.3.5
CompactPCI Mailbox WRITE/READ Interrupt Control Register(Offset: Write 0xD0,
BAR0 Read 0xD2, BAR0) ............................................................................................................. 45
14.3.6
Local Bus Mailbox WRITE/READ Interrupt Control Register(Offset Write 0xD4, BAR0
Read 0xD6, BAR0) ....................................................................................................................... 46
14.3.7
Mailbox Write/Read Interrupt Status Register(Offset: Write 0xD8, BAR0 Read 0xDA,
BAR0) 47
14.3.8
INTREG Register(Offset 0x40, BAR1) ........................................................................ 47
14.4
Example ............................................................................................................................... 48
14.4.1
An Interrupt service routine must be set up, in this the following register will need to be
cleared 48
15
Stand-Alone Mode ........................................................................................................................ 50
16
Performance Figures .................................................................................................................... 51
16.1
Relative JTAG speeds.......................................................................................................... 52
17
Mechanical Dimensions ................................................................................................................ 53
18
Power consumption ...................................................................................................................... 53
19
Cables and Connectors ................................................................................................................ 54
19.1
ComPorts ............................................................................................................................. 54
19.2
Buffered ComPort Cabling ................................................................................................... 54
19.3
JTAG back panel cabling ..................................................................................................... 56
20
Where’s that Jumper?................................................................................................................... 58
21
Expansion Header (J2) ................................................................................................................. 59
22
JTAG Interface circuits.................................................................................................................. 60
22.1
Signal Description ................................................................................................................ 60