Architecture description – Sundance SMT361 User Manual

Page 8

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Version 2.7

Page 8 of 23

SMT361 SMT361A User Manual

Architecture Description


The SMT361 TIM consists of a Texas Instruments TMS320C64xx running at up to
600MHz whereas the SMT361A TIM consists of a Texas Instruments TMS320C64xx
running at up to 720MHz. Modules are populated with 32MBytes of synchronous
DRAM (SDRAM) which runs at 100 MHz for the SMT361 and 120MHz for the
SMT361A.
A Field Programmable Gate Array (FPGA) is used to manage global bus accesses
and implement four communication ports and two Sundance Digital Buses.

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