1 single board computer (sbc) a13 — mg, mgr models, 2 interface board a14 — mg, mgr models, 13 "r" option components — mr, mgr models – KEPCO MBT Series User Manual

Page 125: Interface board a14 — mg, mgr models -19, R" option components — mr, mgr models -19

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MBTSVC111609

4-19

• 24-conductor flat cable between A14J1 and A6J5 (IEEE 488 port)

• 2-wire cable between A14J2 and A8J8 (between A14J2 and A3J1 on models without the

"G" option selector switch)

4.3.12.1 SINGLE BOARD COMPUTER (SBC) A13 — MG, MGR MODELS (See Schematic Diagram,

Figure 6-27)

The Single Board Computer is a microcomputer built around the I80188 microprocessor and
contains the interface for the RS232 bus. The following circuits are located on this board (see
Figure 6-15 for component locations):

• I80188 Microprocessor (U1)

• S-RAM type Memory, 32K x 8 (U14)

• EPROM type Memory, 64K x 8, with proprietary software (U9)

• RS232C Interface Circuit (U10 and U11)

Refer to PAR. 2.8 and Table 2-4 for information regarding options offered by Jumpers J7 and J8.

4.3.12.2 INTERFACE BOARD A14 — MG, MGR MODELS (See Schematic diagram, Figure 6-28)

Interface Board A14 provides separate circuits which interface SBC A13 with both the IEEE 488
bus and the IEEE 1118 bus. See Figure 6-16 for component locations; the following circuits are
contained on this board:

• IEEE 1118 Interface Circuit (U7 through U21)

• IEEE 488 Interface Circuit (U1 through U6, U23)

The IEEE 1118 interface circuits uses an independent microprocessor to control "handshake,"
assembling data received, and stretching data for serial transmission via the two-wire IEEE
1118 bus. SBC circuits are connected to the IEEE 1118 bus via buffer/driver U7 and isolated by
opto-isolators U8 and U9.

4.3.13

"R" OPTION COMPONENTS — MR, MGR MODELS (See Schematic Diagram, Figure 6-20)

MBT Series Power Supplies with the “R” option include a special Relay and Flags Board A2,
and a Power Relay Assembly. These components function to allow the load to be electrically
isolated from the power supply output (output disabled status), and permit reversing the polarity
of the voltage applied to the load (refer also to PAR.s 4.1.11 through 4.1.13).

To preserve the power relays on the power relay assembly, a "dry switching" technique is used.
Each time the relays are operated, the following sequence is executed under control of Relay
and Flags Board A2:

1) If the unit is operating in Voltage mode, the output voltage and current limit parameters are

stored. If the unit is operating in Current mode, the output current and voltage limit param-
eters are stored.

2) The parameters stored in step 1 above are programmed to zero.

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