NEC PD78214 User Manual
Page 403
374
µ
PD78214 Sub-Series
Fig. 13-24 Return from Self-Refresh
Clear RFEN bit to 0
Set RFLV bit to 1
Set RFEN bit to 1
Approximately 200 ns delay
RFLV = 1
Yes
No
Self-refresh mode
Pulse refresh mode (normal operation)
(6) When using the in-circuit emulator, note the following points:
• When the RD signal or WR signal is active, a glitch may occur on pins A16 to A19.
Fig. 13-25 Glitch Observed on Pins A16 to A19 during Emulation
Approx. 2 V
Approx. 10 ns
An (n = 16 -19)
RD or WR signal
• For the RD and WR signals, the hold time of the address signals on pins A16 to A19 is almost 0 ns.
Fig. 13-26 Insufficient Address Hold Time during Emulation
To prevent these problems, it is recommended that a latch be provided for pins A16 to A19 when emulation is
performed (the latch is not necessary for the device).
A16-A19
RD or WR signal
Changes at almost the same time