7 chip erase(1), 7 chip erase – Rainbow Electronics AT45DB161D User Manual
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3500O–DFLASH–11/2012
AT45DB161D
take place in a maximum time of t
SE
. During this time, the status register and the RDY/BUSY pin will indicate that
the part is busy.
Table 7-2.
Sector Erase Addressing
7.7
Chip Erase
The entire main memory can be erased at one time by using the Chip Erase command.
To execute the Chip Erase command, a 4-byte command sequence C7H, 94H, 80H and 9AH must be clocked into
the device. Since the entire memory array is to be erased, no address bytes need to be clocked into the device,
and any data clocked in after the opcode will be ignored. After the last bit of the opcode sequence has been
clocked in, the CS pin can be deasserted to start the erase process. The erase operation is internally self-timed
and should take place in a time of t
CE
. During this time, the Status Register will indicate that the device is busy.
The Chip Erase command will not affect sectors that are protected or locked down; the contents of those sectors
will remain unchanged. Only those sectors that are not protected or locked down will be erased.
Note:
1. Refer to the errata regarding Chip Erase on
.
The WP pin can be asserted while the device is erasing, but protection will not be activated until the internal erase
cycle completes.
Table 7-3.
Chip Erase Command
Figure 7-1.
Chip Erase
Note:
1. Refer to the errata regarding Chip Erase on
PA11/
A20
PA10/
A19
PA9/
A18
PA8/
A17
PA7/
A16
PA6/
A15
PA5/
A14
PA4/
A13
PA3/
A12
PA2/
A11
PA1/
A10
PA0/
A9
Sector
0
0
0
0
0
0
0
0
0
X
X
X
0a
0
0
0
0
0
0
0
0
1
X
X
X
0b
0
0
0
1
X
X
X
X
X
X
X
X
1
0
0
1
0
X
X
X
X
X
X
X
X
2
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
1
1
0
0
X
X
X
X
X
X
X
X
12
1
1
0
1
X
X
X
X
X
X
X
X
13
1
1
1
0
X
X
X
X
X
X
X
X
14
1
1
1
1
X
X
X
X
X
X
X
X
15
Command
Byte 1
Byte 2
Byte 3
Byte 4
Chip Erase
C7H
94H
80H
9AH
Opcode
Byte 1
Opcode
Byte 2
Opcode
Byte 3
Opcode
Byte 4
CS
Each transition
represents eight bits
SI