Altera Avalon Verification IP Suite - Manual (Page 148)

set_enable_c_packet_with_back_pressure()
set_enable_c_packet_with_back_pressure() Prototype:
Verilog HDL:
Boolean
VHDL: N.A.
Arguments:
void
Returns:
Enables a coverage point that ensures test coverage of packet transaction
with backpressure. It is disabled when either the
ready
signal or packet
transmission is not supported.
Description:
Verilog HDL Language support:
set_enable_c_packet_with_idles()
set_enable_c_packet_with_idles()
Prototype:
Verilog HDL:
Boolean
VHDL: N.A.
Arguments:
void Returns:
Enables a coverage point that ensures test coverage of packet transaction
with idle cycles. It is disabled when packet transmission is not supported. Description:
Verilog HDL Language support:
set_enable_c_partial_valid_beats()
set_enable_c_partial_valid_beats()
Prototype:
Verilog HDL:
Boolean
VHDL: N.A.
Arguments:
void
Returns:
Enables a coverage point that ensures test coverage for number of transaction
with partially valid beats. Description:
Verilog HDL Language support:
Avalon-ST Monitor Altera Corporation
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set_enable_c_packet_with_back_pressure() 10-12