A/d stop trigger signal – Measurement Computing PCI-DAS6023 User Manual
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PCI-DAS6023 and PCI-DAS6025 User's Guide
Functional Details
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See Figure 7 and Figure 8 for A/D START TRIGGER input and output timing requirements.
t
w
= 37.5 ns
minimum
Figure 7. A/D START TRIGGER input signal timing
Figure 8. A/D START TRIGGER output signal timing
The A/D START TRIGGER signal is also used to initiate pre-triggered DAQ operations, that is, when you need
to acquire data just previous to a trigger event. In most pre-triggered applications, the A/D START TRIGGER
signal is generated by a software trigger. Descriptions of the use of A/D START TRIGGER and A/D STOP
TRIGGER in pre-triggered DAQ applications follow.
A/D STOP TRIGGER signal
Pre-triggered data acquisition continually acquires data into a circular buffer until a specified number of
samples after the trigger event. Figure 9 illustrates a typical pre-triggered DAQ sequence.
Figure 9. Pre-triggered data acquisition example
The A/D STOP TRIGGER signal signifies when the circular buffer should stop and when the specified number
of post trigger samples should be acquired. It is available as an output and an input. By default, it is available at
AUXIN2 as an input but may be programmed for access at any of the AUXIN pins or at the DAQ-Sync ―DS
A/D STOP TRIGGER‖ input. It may be programmed for access at any of the AUXOUT pins as an output.
When using the A/D STOP TRIGGER signal as an input, the polarity may be configured for either rising or
falling edge. The selected edge of the A/D STOP TRIGGER signal initiates the post-triggered phase of a pre-
triggered acquisition sequence.
As an output, the A/D STOP TRIGGER signal indicates the event separating the pre-trigger data from the post-
trigger data. The output is an active high pulse with a pulse width of 50 ns. Figure 10 and Figure 11 show the
input and output timing requirements for the A/D STOP TRIGGER signal.