Avago Technologies LSI21040 - Manual (Page 48)

3-4 Specifying the Technical Characteristics
3.2 Operational Environment
Use the LSI21040 in PCI computer systems with an ISA/EISA bracket
type. The SDMS operates the board, but the design of the board does
not prevent the use of other software. An on-board flash memory device
is provided to allow BIOS code and open boot code support through PCI
and a serial EEPROM for each channel.
3.2.1 The PCI Interface
The PCI interface operates as a 64-bit DMA bus master. Edge connector
J1 makes the PCI connection, which provides connections on both the
front and back of the board. The signal definitions and pin numbers
conform to the PCI Local Bus Specification Revision 2.2 standard.
Table 3.1 and Table 3.2 show the signal assignments. The on-board
+3.3 V regulator provides power to the PCI portion of the LSI53C1010
device.
Note: The +3.3 V pins are tied together and decoupled with high
frequency bypass capacitors to ground. No current from
these +3.3 V pins is used on the board. The board derives
power from the +5 V pins, directly and through a 3.3 V
voltage regulator. The PCI +3 V/+5 V pins are used to
differentiate between a 5 V or a 3.3 V PCI environment.