Level 1 cache, Unified (data or prog), 4 blocks - each can be ram or cache – Vodafone SS 08 User Manual
Page 27: Async, Sync, 4kb program, 4kb data, Not in map
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TU Dresden, 4/29/2008
Slide 27
chair
‘C6711 Memory Map
Byte Address
FFFF_FFFF
0000_0000
64K x 8 Internal
(L2 cache)
Internal Memory
Unified (data or prog)
4 blocks - each can be
RAM or cache
On-chip Peripherals
0180_0000
External Memory
Async
(SRAM, ROM, etc.)
Sync
(SBSRAM, SDRAM)
256M x 8 External
2
256M x 8 External
3
8000_0000
9000_0000
A000_0000
B000_0000
256M x 8 External
0
256M x 8 External
1
Level 1 Cache
4KB Program
4KB Data
Not in map
CPU
L2
64K
4K
P
4K
D
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