Anritsu MG3700A - Manual (Page 20)

20
MX370001A TD-SCDMA waveform pattern
Optional
■ Frame configuration
• UL-RMC12.2 kbps: For BS receiver test (Uplink):
TS-25.142: BS UL reference measurement channel p132, A2.1.2, 1.28 MCps, SF = 8
Test items: 7.2 Reference sensitivity level / 7.3 Dynamic range / 7.4 Adjacent Channel Selectivity (ACS) / 7.5 Blocking characteristics /
7.6 Inter modulation characteristics
(DPCH)
#0
Dw GP
#1 #2 #3 #4 #5 #6
Up
PT
Time slot Time slot Time slot Time slot Time slot Time slot Time slot
PTS
DPCH
1) DTCH information bits: PN9
2) TFCI (4bits): 0
3) TPC (4bits): 0101: No power control
4) SS (4bits): 0101: No shift
5) Scrambling Code: 0
6) Midamble Code: MID=0, K=2, k=1
7) Channelization Code: C (8, 1)
C (8,1) m (1) C (8,1) GP (ts)
16 chip
Time Slot
GP
P-CCPCH (P-CCPCH1, P-CCPCH2)
1) Information bits: data (246 bit):
Frame Number/2 is inserted to the first 11 bits, and 0s
are stored in the remaining bits. The frame number is a
repeated value of 0, 1, 2, and 3.
2) Scrambling Code: 0
3) Midamble Code: MID= 0, K =8, k =1
4) Channelization Code: C(16, 1), C(16, 2)
1) DTCH information bits: PN9
2) DCCH information bits: ALL0
3) TFCI (4bits): 0
4) TPC (4bits): 0101: No power control
5) SS (4bits): 0101: No shift
6) Scrambling Code: 0
7) Midamble Code: MID=0, K=2, k=1
Default midamble
8) Channelization Code: C(16, 1), C(16, 2)
DPCH ( DPCH1, DPCH2)
Time slot
#0
Dw
PTS
Up
PT Time slot
#1
Time slot
#2
Time slot
#3
Time slot
#4
Time slot
#5
Time slot
#6
Time
Slot GP (ts)
16 chip C1, C2 C1, C2 m (1)
DwPTS
SYNC-DL ID: 0
Phase quadruple: S1: P-CCPCH
• UL-RMC12.2 kbps: For UE receiver test (Uplink):
TS-25.102: UE DL reference measurement channel p58, A.2.2.2.1, 1.28 MCps, 12.2 kbps, SF = 16
Test items: 7.3 Reference sensitivity level / 7.4 Maximum input level / 7.5 Adjacent Channel selectivity (ACS) / 7.6 Blocking
characteristics / 7.7 Spurious response / 7.8 Inter modulation characteristics
*MX370X_E_050127 1/28/05 8:51 AM Page 20