Anritsu MG3700A User Manual

Page 33

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33

Optional

MX370103A CDMA2000 1xEV-DO IQproducer

1xEV-DO Reverse Setting range:

Display

Description

Setting range

Over Sampling

Ratio of the waveform pattern sampling rate and the chip rate

4, 8, 16

Carrier On/Off

Set the carrier On/Off. It is “On” when checked.

On, Off

Long Code Mask

Set the I and Q long code masks. MQ is set automatically when MI is set by a user.

MI, MQ: 0x0 to
0x3FFFFFFFFFF

Power

Set the power of carrier.

–80.000 to 0.000 dB

Frequency Offset

Set the carrier frequency offset from the center frequency setting of the MG3700A.

–5.000 to 5.000MHz

Delay

Set the delay of the carrier. A delay is a time gap from when a frame trigger is output
from the rear panel of the MG3700A to when the first frame of the carrier is output.

0 chip to 32768 chip

Phase Offset

Set a phase offset of the carrier.

0.000 to 2.000 pai rad.

DRC CH On/Off

Set the DRC channel On/Off. It is “On” when checked.

On, Off

DRC CH Gain

Set the channel gain of the DRC channel by a relative value to the pilot channel.

–80.000 to 20.000 dB

DRC Symbol

Set the DRC channel symbol data in hexadecimal.

0000000000000000 to
FFFFFFFFFFFFFFFF(HEX)

DRC Cover Symbol

Set the DRC cover symbol data in octal.

0000000000000000 to
7777777777777777(OCT)

ACK CH On/Off

Set the ACK channel On/Off. It is “On” when checked.

On, Off

ACK CH Gain

Set the channel gain of the ACK channel by a relative value to the pilot channel.

–80.000 to 20.000 dB

ACK CH Bit

Set the ACK channel bit.

A (ACK), N (NACK), X (DTX)

Data CH On/Off

Set the Data channel On/Off. It is “On” when checked.

On, Off

Data CH Gain

Set the channel gain of the Data channel by a relative value to the pilot channel.

–80.000 to 20.000 dB

Data Rate

Set the Data channel data rate.

9.6, 19.2, 38.4, 76.8, 153.6 kbps

Data

Set the Data channel payload data. The selection item “PN9fix” specifies a
discontinuous PN9 code sequence.

PN9fix, All '0', All '1'

Initial LFSR

When PN9fix is set for Data, set the initial value of the PN9 generation shift register in
hexadecimal.

0 to 1FF (HEX)

RRI Symbol

Set the RRI symbol in binary.

000 to 101 (BIN)

*MX370X_E_050127 1/28/05 8:54 AM Page 33

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