Software interrupt set register (bits 815), Interrupt clear register (bits 2431) – Motorola MVME1X7P User Manual
Page 175
LCSR Programming Model
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Software Interrupt Set Register (bits 8-15)
This register is used to set the software interrupts. An interrupt is set by
writing a 1 to it. The software interrupt set bits are:
SSW0
Set software 0 interrupt.
SSW1
Set software 1 interrupt.
SSW2
Set software 2 interrupt.
SSW3
Set software 3 interrupt.
SSW4
Set software 4 interrupt.
SSW5
Set software 5 interrupt.
SSW6
Set software 6 interrupt.
SSW7
Set software 7 interrupt.
Interrupt Clear Register (bits 24-31)
This register is used to clear the edge-sensitive interrupts. An interrupt is
cleared by writing a 1 to its clear bit. The clear bits are defined below.
CTIC1
Clear tick timer 1 interrupt.
CTIC2
Clear tick timer 2 interrupt.
ADR/SIZ
$FFF40070 (8 bits of 32)
BIT
15
14
13
12
11
10
9
8
NAME
SSW7
SSW6
SSW5
SSW4
SSW3
SSW2
SSW1
SSW0
OPER
S
S
S
S
S
S
S
S
RESET
0 PSL
0 PSL
0 PSL
0 PSL
0 PSL
0 PSL
0 PSL
0 PSL
ADR/SIZ
$FFF40074 (8 bits of 32)
BIT
31
30
29
28
27
26
25
24
NAME
CACF
CAB
CSYSF
CMWP
CPE
CVI1E
CTIC2
CTIC1
OPER
C
C
C
C
C
C
C
C
RESET
0 PSL
0 PSL
0 PSL
0 PSL
0 PSL
0 PSL
0 PSL
0 PSL