NEC PD75402A - Manual (Page 75)

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CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS
5.3.2 Clock Output Mode Register (CLOM)
CLOM is a 4-bit register used to control clock output.
CLOM is set by a 4-bit memory handling instruction. Bit handling instructions cannot be used. Also, this register
cannot be read.
RESET input clears CLOM to zero and selects the clock output disabled state.
Fig. 5-19 Clock Output Mode Register Format
Note Ensure that 0 is written to bit 2 of CLOM.
Address 3 2 1 0 Symbol
FD0H CLOM3 0 CLOM1 CLOM0 CLOM
Clock output frequency selection bits ( ) : When f XX = 4.19 MHz
0 0
Φ
output* (1.05 MHz, 524 kHz, 65.5 kHz)
0 1
Setting prohibited
1 0
1 1 f XX /2 6 output (65.5 kHz)
*
Φ
is the CPU clock selected by PCC
Clock output enable/disable bit
0 Output disabled
0 Output enabled