NEC PD17062 User Manual

Page 12

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12

µ

PD17062

Pin No.

DIP QFP

(GC)

Symbol

Description

Output type

At power-on reset

P1A

3

|

P1A

0

P1B

3

|

P1B

0

RED

GREEN

BLUE

BLANK

H

SYNC

V

SYNC

P1C

3

/ADC

1

P1C

2

P1C

1

ADC

0

P0B

3

/HSCNT

P0B

2

/TMIN

P0B

1

P0B

0

/SI

P0A

3

/SO

P0A

2

/SCK

P0A

1

/SCL

P0A

0

/SDA

21

|

24

26

|

29

30

31

32

33

34

35

36

|

38

39

40

|

43

44

|

47

20

|

24

27

|

30

31

32

33

34

35

36

38

|

45

46

47

|

50

51

|

54

4-bit output port. This N-ch open-drain output

port has an intermediate withstand voltage.

4-bit I/O port. Each bit can be set for input or

output.

Outputs the character data corresponding to R, G,

and B of the IDC display. The output is active-

high.

Outputs the blanking signal for cutting the

video signal of the IDC display. The output is

active-high.

Inputs the horizontal synchronizing signal of the

IDC display. The input must be active-low.

Inputs the vertical synchronizing signal of the IDC

display. The input must be active-low. The input

signal can generate an interrupt.

Input of port 1C and A/D converter

• P1C

3

to P1C

1

3-bit I/O port

• ADC

1

Input of a 4-bit A/D converter

Input of a 4-bit A/D converter

Serial interface and input for port 0B, port 0A,

horizontal synchronizing signal counter, and

timer

• P0A

3

to P0A

0

4-bit I/O port. Each bit can be set for input or

output.

• P0B

3

to P0B

0

4-bit I/O port. Each bit can be set for input or

output.

• HSCNT

Inputs the count of the horizontal

synchronizing signal. The input is self-

biased.

• TMIN

Timer input. The pin inputs the commercial

power to be used for the clock.

• SI, SO, SCK

Input/output for the three-wire serial interface

• SI: Serial data input

• SO: Serial data output

• SCK: Shift clock input/output

• SDA, SCL

Input/output for the two-wire serial interface

• SCL: Serial clock input/output

• SDA: Serial data input/output

N-ch open-drain

CMOS push-pull

CMOS push-pull

CMOS push-pull

CMOS push-pull

N-ch open-drain

(P0A

1

, P0A

0

)

CMOS push-pull

(Other than P0A

1

or P0A

0

)

Undefined

Input

Low level

Low level

Input

Input

Input

Input

Input

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