NEC PD78F9488 - Manual (Page 207)

CHAPTER 11 SERIAL INTERFACE 20
User’s Manual U15331EJ4V1UD
207
(d) Reception
When bit 6 (RXE20) of asynchronous serial interface mode register 20 (ASIM20) is set (1), a receive
operation is enabled and sampling of the RxD20 pin input is performed.
RxD20 pin input sampling is performed using the serial clock specified by BRGC20.
When the RxD20 pin input becomes low, the 3-bit counter starts counting, and when half the time
determined by the specified baud rate has passed, the data sampling start timing signal is output. If the
RxD20 pin input sampled again as a result of this start timing signal is low, it is identified as a start bit,
the 3-bit counter is initialized and starts counting, and data sampling is performed. When character data,
a parity bit, and one stop bit are detected after the start bit, reception of one frame of data ends.
When one frame of data has been received, the receive data in the shift register is transferred to receive
buffer register 20 (RXB20), and a reception completion interrupt (INTSR20) is generated.
If an error occurs, the receive data in which the error occurred is still transferred to RXB20, and INTSR20
is generated.
If the RXE20 bit is reset (0) during the receive operation, the receive operation is stopped immediately.
In this case, the contents of RXB20 and asynchronous serial interface status register 20 (ASIS20) are
not changed, and INTSR20 is not generated.
Figure 11-9. Asynchronous Serial Interface Reception Completion Interrupt Timing
STOP
Parity D7 D6 D2 D1 D0
START
RxD20 (input)
INTSR20
Caution Be sure to read receive buffer register 20 (RXB20) even if a receive error occurs. If
RXB20 is not read, an overrun error will occur when the next data is received, and the
receive error state will continue indefinitely.