2 register controlling standby function – NEC PD78F9488 User Manual
Page 308
CHAPTER 17 STANDBY FUNCTION
308
User’s Manual U15331EJ4V1UD
17.1.2 Register controlling standby function
The wait time after the STOP mode is released upon interrupt request generation until oscillation stabilizes is
controlled by the oscillation stabilization time selection register (OSTS).
OSTS is set with an 8-bit memory manipulation instruction.
RESET input sets OSTS to 04H. However, it takes 2
15
/f
X
, not 2
17
/f
X
, to stabilize oscillation after RESET input.
Figure 17-1. Format of Oscillation Stabilization Time Selection Register
OSTS2
0
0
1
0
0
0
0
0
OSTS2 OSTS1 OSTS0
OSTS
R/W
FFFAH
04H
R/W
7
6
5
4
3
2
1
0
OSTS1
0
1
0
2
12
/f
X
2
15
/f
X
2
17
/f
X
(819 s)
(6.55 ms)
(26.2 ms)
OSTS0
0
0
0
Setting prohibited
Symbol
Address
After reset
Oscillation stabilization time selection
Other than above
µ
Caution The wait time after the STOP mode is released does not include the time from STOP mode
release to clock oscillation start (“a” in the figure below), regardless of whether STOP mode is
released by RESET input or by interrupt generation.
a
STOP mode release
X1 pin voltage
waveform
Remarks 1. f
X
: Main system clock oscillation frequency
2. The parenthesized values apply to operation at f
X
= 5.0 MHz.