Bit load, Z8018x family mpu user manual, Table 42. 16-bit load – Zilog Z80180 User Manual
Page 239: Table 41. 8-bit load (continued)
Z8018x
Family MPU User Manual
UM005003-0703
223
Load
8-Bit
Data
LD (IX + d),m
11 011 101 S
D
4
15
m
®(IX + d)
M
· · · ·
· ·
00 110 110
<d>
LD (IY + d),m
11 111 101 S
D
4
15
m
®(IY + d)
M
· · · ·
· ·
01 110 g
<d>
<m>
LD (HL),g
01 110 g
S
D
1
7
gr
®(HL)
M
· · · ·
· ·
LD (IX + d),g
11 011 101
D
S
3
15
gr
®(IX+d)
M
· · · ·
· ·
01 110 g
<d>
LD (IY + d),g
11 111 101
D
S
3
15
gr
®(IY + d)
M
· · · ·
· ·
01 110 g
<d>
(1) In the case of R1 and Z Mask, interrupts are not sampled at the end of LD A, I or LD A,R.
Table 42. 16-Bit Load
Operation
Name
Mnemonics
Op Code
Addressing
Bytes States Operation
Flags
7 6 4 2
1 0
Immed
Ext Ind
Reg RegI Imp Rel
S Z H P/V N C
Load
16-Bit
Data
LD ww,mn
00 ww0 001
S
D
3
9
mn
®ww
R
· · · ·
· ·
<n>
<m>
LD IX,mn
11 011 101
S
D
4
12
mn
®IX
R
· · · ·
· ·
00 100 001
<n>
<m>
Table 41. 8-Bit Load (Continued)
Operation
Name
Mnemonics
Op Code
Addressing
Bytes States Operation
Flags
7 6 4 2
1 0
Immed Ext
Ind
Reg
RegI Imp
Rel
S Z H P/V
N C