Grass Valley PDR 200 Service Manual - Manual (Page 39)

Reference Genlock
PDR200 Service Manual 3-7
Reference Genlock
The GenLock circuit board, a seven inch high EISA-compatible board, performs
multiple functions. The board is the source of the internal reference timing signals
(27 MHz and Field Reference) that go to other boards in the system. It accepts a color
black or composite analog signal as the reference input. If there is no reference input
signal, the Genlock circuit free-runs.
In addition to the system timing functions, the board also provides four Longitudinal
Time Code (LTC) inputs and four outputs through a DB-25 connector on the rear of
the Reference Genlock circuit board.
Reference Genlock board features are:
• Sync Extraction provides horizontal (line) and vertical (field) timing information
to the Timing Generator. Its frame sync capability provides good noisy signal
handling.
• Chroma Lock, which locks up to the incoming burst, provides the timing generator
with the location and duration of the burst. This in turn aids the Timing Generator
in locating valid sync.
• Timing Generator provides the reference timing signals. This Generator operates
on a clock derived from the color burst on the incoming reference. The Timing
Generator obtains vertical and horizontal phasing from the Sync Extraction circuit.
The overall timing of the Timing Generator may be offset from the reference input
under operator control.
• LTC Reader implemented by a time code reader chip.
• LTC Writer generates an LTC signal under processor control.
• EISA Bus Interface is a 16-bit EISA Slave I/O interface. In addition to mapping the
on-board control registers into the slot specific EISA Bus I/O space, this interface
also responds with the standard EISA ID Word for software board identification
purposes.