Motorola DSP96002 - Manual (Page 795)

MOTOROLA 13
since these will be usually locked, all further accesses to these locations would not cause
a miss and therefore the external Program Memory would not be read. In this case the
non-consistency would have no affect. On the other hand, a user that switches from
PRAM mode to cache mode and doesn’t want the content to be kept should issue the
PFLUSH instruction and therefore prevent this situation altogether.
Before switching from PRAM mode to cache mode, or before issuing a PFLUSH instruc-
tion while in PRAM mode, it is the user’s responsibility to check that any previously started
DMA transfers to/from Program Memory have been completed.
2.9 MOVEM/MOVEP/MOVES INSTRUCTIONS
The MOVE(M) instruction (Move Program Memory) performs a move from a register to
program memory or from program memory to a register. For simplicity, this discussion will
use the term “MOVEM-in” to indicate a MOVEM into the program memory and the term
“MOVEM-out” to indicate a MOVEM from program memory. Furthermore, MOVE(P) in-
struction (Move Peripheral Data) and MOVE(S) instruction (Move Absolute Short) perform
similarly when the source or destination is a program memory location, and therefore will
not be mentioned separately.
The MOVE(M) instruction is widely used by the OnCE. For example, MOVEM-out is used
for program memory display and disassembler while MOVEM-in is used by in-line assem-
bler and software breakpoints.
For compatibility reasons, all of these capabilities are available in cache mode. Therefore,
when performing a MOVEM-out instruction, the program memory location has to be read
from the cache if it resides in the cache (hit), and from the external program memory if it
does not (miss). When preforming a MOVEM-in, the program memory location has to be
written both inside the cache and in the external program memory if there was a hit (to
maintain cache coherency) but only in the external program memory if there was a cache
miss.
In cache mode, neither MOVEM-out nor MOVEM-in updates the valid-bit or the LRU sta-
tus, nor do they write back the missed word into the cache if there was a miss! This is be-
cause MOVEM instruction is NOT an instruction fetch. Furthermore, it allows the user to
use the MOVEM with OnCE in a non-intrusive manner.
While in PRAM mode a MOVEM-in to the internal PRAM should set the corresponding val-
id-bit, to indicate that the location has been initialized. This feature could be useful for a
user that wises to load his cache while still in PRAM mode.
Note: For implementation reasons, when a MOVEM-in in cache mode causes a word
miss, but a sector hit (i.e. the specified word is not in the cache but the sector it belongs