Altera 40-Gbps Ethernet MAC and PHY MegaCore Function User Manual
Page 181
Word
Addr
Bit
R/W
Name
Description
0xCB
24:0 RO
AN LP ADV Tech_
A[24:0]
Received technology ability field bits of Clause 73
Auto-Negotiation. The 10GBASE-KR PHY supports A0 and
A2. The following protocols are defined:
• A0 1000BASE-KX
• A1 10GBASE-KX4
• A2 10GBASE-KR
• A3 40GBASE-KR4
• A4 40GBASE-CR4
• A5 100GBASE-CR10
• A24:6 are reserved
For more information, refer to Clause 73.6.4 and AN LP base
page ability registers (7.19-7.21) of Clause 45 of IEEE
802.3ap
-
2007.
26:25 RO
AN LP ADV FEC_
F[1:0]
Received FEC ability bits. FEC [F0:F1] is encoded in bits
D46:D47 of the base Link Codeword as described in Clause
73 AN, 73.6.5. Bit[26] corresponding to F1 is the request bit.
Bit[25] corresponding to F0 is the FEC ability bit.
27
RO
AN LP ADV Remote
Fault
Received Remote Fault (RF) ability bits. RF is encoded in bit
D13 of the base link codeword in Clause 73 AN. For more
information, refer to Clause 73.6.7 and bits AN LP base page
ability register AN LP base page ability registers (7.19-7.21) of
Clause 45 of IEEE 802.3ap
-
2007.
30:28 RO
AN LP ADV Pause
Ability_C[2:0]
Received pause ability bits. Pause (C0:C1) is encoded in bits
D11:D10 of the base link codeword in Clause 73 AN as
follows:
• C0 is the same as PAUSE as defined in Annex 28B
• C1 is the same as ASM_DIR as defined in Annex 28B
• C2 is reserved
For more information, refer to bits AN LP base page ability
registers (7.19-7.21) of Clause 45 of IEEE 802.3ap
-
2007.
0xD0
0
RW
Link Training
enable
When 1, enables the 10GBASE-KR start-up protocol. When
0, disables the 10GBASE-KR start-up protocol. The default
value is 1. For more information, refer to Clause 72.6.10.3.1
and 10GBASE-KR PMD control register bit (1.150.1) of IEEE
802.3ap
-
2007.
1
RW
dis_max_wait_tmr
When set to 1, disables the LT max_wait_timer . Used for
characterization mode when setting much longer BER timer
values.
2
RW
quick_mode
When set to 1, only the init and preset values are used to
calculate the best BER.
3
RW
pass_one
When set to 1, the BER algorithm considers more than the
first local minimum when searching for the lowest BER. The
default value is 1.
C-8
10GBASE-KR PHY Register Definitions
UG-01088
2014.12.15
Altera Corporation
10GBASE-KR Registers