Hapter – Zilog Z16C30 User Manual
Page 68
5-1
Z16C30 USC
®
U
SER
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S
M
ANUAL
Z
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UM97USC0100
5.1 INTRODUCTION
U
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ANUAL
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HAPTER
5
S
ERIAL
M
ODES
AND
P
ROTOCOLS
The main advantage of USC
®
family members is that they
can communicate in many different modes and serial
protocols. This, in turn, makes for more flexible and ca-
pable products for Zilog’s customers. This chapter de-
scribes how to set up and use the USC in its various modes
of serial operation. These modes can be classified into
three major categories: asynchronous, character-oriented
synchronous, and bit-oriented synchronous protocols.
5.2 ASYNCHRONOUS MODES
Figure 5-1 shows how a "start bit" precedes each character
in async communications, and that so-called "stop bits"
separate characters. A start bit is a period of space/zero
that’s the same length as each following data bit. Each stop
bit is a period of mark/one that's more that half a bit time
long, with a typical minimum duration of one bit time. (The
USC and other devices offer the ability to “shave” stop bits
to less than a bit time.) In most forms of async, the falling
edge between a stop bit and the next start bit can come
any time after this minimum stop bit duration. In other
words, the length of the stop bit does not have to be any
particular multiple of the nominal bit time.
To handle this variability in the length of stop bits, asyn-
chronous receivers “oversample” the received serial data
at some multiple of the nominal bit frequency. Software can
set up a USC Receiver to do this at 16, 32, or 64 samples/
bit. When a Receiver is waiting for a start bit and succes-
sive samples reveal a falling edge, it typically samples
again one-half bit time later, to validate the start bit. If the
serial data is still space/zero, the receiver then samples the
following data bits and stop bit at their nominal centers
after that. If the hardware samples the stop bit as space/
zero, the associated character is invalid or at least highly
suspect.
Some async protocols check further for serial link errors by
including a parity bit with each character. The transmitter
generates such a bit so that the total number of 1 bits in the
character is odd or even. The receiving station checks
each parity bit. If it finds an incorrect one, it discards the
character and/or notifies the operator(s) of the receiving
and/or transmitting machine(s). But a single parity bit is not
a very reliable checking method — it can be easily de-
ceived by errors that affect more than one bit. Few async
applications use parity checking nowadays, although they
may generate it, in case they find themselves talking to
equipment that does. Where protection against line errors
is important, some async applications may use block-
oriented checking as described below for synchronous
protocols.
Each USC channel can handle a variety of options within
“classic” async operation, plus several unique variants. In
isochronous mode, the data format is similar to classic
async, but external hardware supplies a bit-synchronized
1x clock instead of a 16x, 32x, or 64x clock. In Nine-Bit
mode, an extra bit differentiates between “address” char-
acters that select a particular destination on a multi-station
link, and subsequent data characters.
UM009402-0201