Sundance Spas ST201 - Manual (Page 12)

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Sundance Technology ST201 PRELIMINARY draft 2
EXPANSION ROM INTERFACE
The ST201 provides support for an optional Expan-
sion ROM. The ST201 supports the Atmel
AT29C512 (64K x 8) Flash EPROM device.
The Expansion ROM is configured through the PCI
configuration register, which maps the ROM into
the memory space of the host system. The ROM
contents can be scanned, copied to system RAM,
and executed at system initialization time.
The ROM is also byte-read and byte-write accessi-
ble to the host CPU using the ExpRomData and
ExpRomAddr registers. This allows a diagnostic
program to read or modify the ROM contents with-
out having to write to configuration registers.
OPERATION
Proper operation of the ST201 in a system requires
an understanding of initialization tasks, register
programming, transmit and receive behavior, inter-
rupt handling, statistic gathering, PCI bus transac-
tions, and power management capabilities.
INITIALIZATION
The ST201 provides several resets. The assertion
of the hardware reset signal on the PCI bus causes
a complete reset of the ST201. The ST201 configu-
rations previously set are lost after reset. A similar
reset is available v ia software using the GlobalRe-
set bit of the AsicCtrl register. The AsicCtrl register
also allows for selective reset of particular func-
tional blocks of the ST201. See the Registers and
Data Structures section for details on using the
AsicCtrl register for resetting the ST201.
The external serial EEPROM is used for non-vola-
tile storage of configuration information across
ST201 resets. Shortly after reset, the ST201 will
read the contents of an external EEPROM, placing
the data read into the following registers:
• ConfigParm
• AsicCtrl (least significant 16 bits)
• SubsystemVendorId
• SubsystemId
• StationAddress
There are several other registers which must be
configured during initialization. These registers
include the ST201 PCI configuration registers
which are set during a Power On Self Test (POST)
routine performed by the host system. Specifically,
the registers set during this stage of initialization
are:
• ConfigCommand enables adapter operation by
allowing it to respond to and generate PCI bus
cycles. ConfigCommand is also used to enable
parity error generation.
• loBaseAddress sets the I/O base address for the
ST201 registers.
• MemBaseAddress sets the memory base address
for the ST201 registers.
• ExpRomBaseAddress sets the base address and
size for an installed expansion ROM, if any.
• CacheLineSize indicates the system’s cache line
size. This value is used by the ST201 to opti-
mize bus master data transfers.
• LatencyTimer sets the length of time the ST201
can hold the PCI bus as a bus master.
• InterruptLine maps ST201’s interrupt request to a
specific interrupt line (level) on the system
board.
• AsicCtrl is used to setup internal operations and
parameters.
The ST201 can be accessed across the PCI bus
without setting the PCI registers or reading data
from an external EEPROM. In this Forced Configu-
ration mode (useful for embedded applications
without an EEPROM), the ST201 is forced to the
following configuration:
• I/O base address 200h
• I/O target cycles enabled
• Memory target cycles disabled
• Bus master cycles enabled
• Expansion ROM cycles disabled
REGISTER PROGRAMMING
After initializing the ST201 to facilitate communica-
tion with the host system, an additional set of regis-
ters specific to operation of the Ethernet network
must be set.
The first setting relates to the Auto-Negotiation fea-
tures present in most Ethernet PHY devices. Since
the ST201 does not participate in the Auto-Negoti-
ation process, the host system must communicate
with the PHY device (across the MII Management
Interface) to determine the link status. Once the
result of Auto-Negotiation is determined, if a full
duplex mode has been chosen, the host system
must set the FullDuplexEnable bit in the MACCtrl
register. Other modes chosen during Auto-Negoti-
ation do not require any ST201 register settings.
The ReceiveMode register determines which types
of frames, based on address matching mechanism,
the ST201 will receive. The host system must pro-
gram the adapter’s node address into the Station-
Address registers. This node address can be
obtained either from the EEPROM, or the host sys-
tem can set the value directly. Then, by setting the
ReceiveUnicast bit in the ReceiveMode register,
the ST201 will receive unicast frames whose desti-
nation address matches the value in the StationAd-