Sundance Spas ST201 - Manual (Page 99)

99
Sundance Technology ST201 PRELIMINARY draft 2
MULTIPLECOLLISIONFRAMES
Class....................I/O Registers, Statistics
Base Address ......IoBaseAddress register value
Address Offset .....0x76
Access Mode .......Read (also clears register)/Write
Width ...................8 bits
BIT BIT NAME BIT DESCRIPTION
7..0 MultipleCollision-
Frames This statistic counts the number of frames that are involved in more
than one collision and are subsequently transmitted successfully. This
is a 8-bit counter and will wrap around to zero after reaching ffh. An
UpdateStats interrupt will occur, if enabled, when the counter has
counted through c0h.