Zilog Z08470 - Manual (Page 158)

Z80 Instruction Set UM008007-0715
146
Z80 CPU
User Manual
ADD A, (HL)
Operation
A ← A + (HL)
Op Code
ADD
Operands
A, (HL)
Description
The byte at the memory address specified by the contents of the HL register pair is added
to the contents of the Accumulator, and the result is stored in the Accumulator.
Condition Bits Affected
S is set if result is negative; otherwise, it is reset.
Z is set if result is 0; otherwise, it is reset.
H is set if carry from bit 3; otherwise, it is reset.
P/V is set if overflow; otherwise, it is reset.
N is reset.
C is set if carry from bit 7; otherwise, it is reset.
Example
If the Accumulator contains A0h , register pair HL contains 2323h , and memory location
2323h contains byte 08h , then upon the execution of an ADD A, (HL) instruction, the
Accumulator contains A8h .
M Cycles T States 4 MHz E.T.
2 7 (4, 3) 1.75
1 0 0 1 0 1 0 0 86