Zilog Z08470 - Manual (Page 177)

UM008007-0715 Z80 Instruction Description
Z80 CPU
User Manual
165
INC (HL)
Operation
(HL) ← (HL) + 1
Op Code
INC
Operand
(HL)
Description
The byte contained in the address specified by the contents of the HL register pair is incre-
mented.
Condition Bits Affected
S is set if result is negative; otherwise, it is reset.
Z is set if result is 0; otherwise, it is reset.
H is set if carry from bit 3; otherwise, it is reset.
P/V is set if (HL) was 7Fh before operation; otherwise, it is reset.
N is reset.
C is not affected.
Example
If the HL register pair contains 3434h and address 3434h contains 82h , then upon the
execution of an INC (HL) instruction, memory location 3434h contains 83h .
M Cycles T States 4 MHz E.T.
3 11 (4, 4, 3) 2.75
0 0 1 0 0 1 1 0 34