Intel STL2 - Manual (Page 9)

STL2 Server Board TPS Introduction
Revision 1.0 1-1
1. Introduction
1.1 Purpose
This document provides an architectural overview of the STL2 server board, including the
board layout of major components and connectors, and an overview of the server board’s
feature set.
1.2 Audience
This document is written for technical personnel who want a technical overview of the STL2
server board. Familiarity with the personal computer, Intel server architecture and the PCI local
bus architecture is assumed.
1.3 STL2 Server Board Feature Overview
The STL2 server board provides the following features:
•
Dual Intel® Pentium® III processor support.
- Support for one or two identical Intel Pentium III processors for the PGA370 socket,
which utilizes a new package technology called the Flip Chip Pin Grid Array (FC-
PGA) package.
- One embedded VRM for support of the primary processor, and one VRM connector
for support of the secondary processor.
•
ServerWorks* ServerSet* III LE chipset.
- 133 MHz Front Side Bus Capability.
- NB6635 North Bridge 3.0 LE.
- IB6566 South Bridge.
• Support for four 3.3V, registered ECC SDRAM DIMMs that are compliant with the
JEDEC PC133 specification.
- Support for DIMM sizes 64 MB to 1GB. Four DIMM slots allow a maxiumum installed
memory of 4GB.
- ECC single-bit correction, and multiple-bit detection.
• 64-bit, 66 MHz, 3.3V keyed PCI segment with two expansion connectors and one
embedded device.
- Two 64-bit, 66 MHz, 3.3V keyed PCI expansion slots.
- Integrated on-board Adaptec* AIC7899 PCI dual-port SCSI controller that provides
separate Ultra160 and Ultra Wide SCSI channels.