Freescale Semiconductor MPC8260 - Manual (Page 168)

Memory Map
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
3-22 Freescale Semiconductor
0x11B03 Reserved — 8 bits — —
0x11B04 CPM mux FCC clock route register (CMXFCR) R/W 32 bits 0x0000_0000 16.4.4/16-13
0x11B08 CPM mux SCC clock route register (CMXSCR) R/W 32 bits 0x0000_0000 16.4.5/16-16
0x11B0C CPM mux SMC clock route register (CMXSMR) R/W 8 bits 0x00 16.4.6/16-19
0x11B0D Reserved — 8 bits — —
0x11B0E CPM mux UTOPIA address register (CMXUAR)
5
R/W 16 bits 0x0000 16.4.1/16-7
0x11B10–
0x11B1F
Reserved — 16 bytes — —
SI1 Registers
0x11B20 SI1 TDMA1 mode register (SI1AMR) R/W 16 bits 0x0000 15.5.2/15-17
0x11B22 SI1 TDMB1 mode register (SI1BMR) R/W 16 bits 0x0000
0x11B24 SI1 TDMC1 mode register (SI1CMR) R/W 16 bits 0x0000
0x11B26 SI1 TDMD1 mode register (SI1DMR) R/W 16 bits 0x0000
0x11B28 SI1 global mode register (SI1GMR) R/W 8 bits 0x00 15.5.1/15-17
0x11B29 Reserved — 8 bits — —
0x11B2A SI1 command register (SI1CMDR) R/W 8 bits 0x00 15.5.4/15-24
0x11B2B Reserved — 8 bits — —
0x11B2C SI1 status register (SI1STR) R/W 8 bits 0x00 15.5.5/15-25
0x11B2D Reserved — 8 bits — —
0x11B2E SI1 RAM shadow address register (SI1RSR) R/W 16 bits 0x0000 15.5.3/15-23
MCC1 Registers
6
0x11B30 MCC1 event register (MCCE1) 6 R/W 16 bits 0x0000 28.8.1/28-37
0x11B32 Reserved — 16 bits —
0x11B34 MCC1 mask register (MCCM1) 6 R/W 16 bits 0x0000 28.8.1/28-37
0x11B36 Reserved — 16 bits — —
0x11B38 MCC1 configuration register (MCCF1)
6
R/W 8 bits 0x00 28.6/28-33
0x11B39–
0x11B3F
Reserved — 7 bytes — —
Table 3-1. Internal Memory Map (continued)
Address
(offset)
Register R/W Size Reset Section/Page