Freescale Semiconductor MPC8260 - Manual (Page 42)

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
xl Freescale Semiconductor
Contents
Paragraph
Number
Title
Page
Number
34.4.2.1 TC Layer General Event Register (TCGER)....................................................... 34-11
34.4.2.2 TC Layer General Status Register (TCGSR)....................................................... 34-11
34.4.3 TC Layer Cell Counters ........................................................................................... 34-12
34.4.3.1 Received Cell Counter [1–8] (TC_RCCx) .......................................................... 34-12
34.4.3.2 Transmitted Cell Counter [1–8] (TC_TCCx) ...................................................... 34-12
34.4.3.3 Errored Cell Counter [1–8] (TC_ECCx) ............................................................. 34-12
34.4.3.4 Corrected Cell Counter [1–8] (TC_CCCx).......................................................... 34-12
34.4.3.5 Transmitted IDLE Cell Counter [1–8] (TC_ICCx) ............................................. 34-12
34.4.3.6 Filtered Cell Counter [1–8] (TC_FCCx) ............................................................. 34-13
34.4.4 Programming FCC2................................................................................................. 34-13
34.4.5 Programming and Operating the TC Layer ............................................................. 34-13
34.4.5.1 Receive ................................................................................................................ 34-13
34.4.5.2 Transmit ............................................................................................................... 34-13
34.5 Implementation Example ............................................................................................. 34-15
34.5.1 Operating the TC Layer at Higher Frequencies....................................................... 34-16
34.5.2 Programming a T1 Application ............................................................................... 34-16
34.5.3 Step 1 ....................................................................................................................... 34-17
34.5.4 Step 2 ....................................................................................................................... 34-17
34.5.5 Step 3 ....................................................................................................................... 34-17
34.5.6 Step 4 ....................................................................................................................... 34-17
34.5.7 Step 5 ....................................................................................................................... 34-17
34.5.8 Step 6 ....................................................................................................................... 34-18
34.5.9 Step 7 ....................................................................................................................... 34-18
Chapter 35
Fast Ethernet Controller
35.1 Fast Ethernet on the PowerQUICC II ............................................................................ 35-2
35.2 Features .......................................................................................................................... 35-2
35.3 Connecting the PowerQUICC II to Fast Ethernet ......................................................... 35-4
35.4 Ethernet Channel Frame Transmission .......................................................................... 35-5
35.5 Ethernet Channel Frame Reception ............................................................................... 35-6
35.6 Flow Control .................................................................................................................. 35-7
35.7 CAM Interface ............................................................................................................... 35-7
35.8 Ethernet Parameter RAM............................................................................................... 35-8
35.9 Programming Model .................................................................................................... 35-11
35.10 Ethernet Command Set ................................................................................................ 35-11
35.11 RMON Support............................................................................................................ 35-13
35.12 Ethernet Address Recognition ..................................................................................... 35-14
35.13 Hash Table Algorithm.................................................................................................. 35-16
35.14 Interpacket Gap Time................................................................................................... 35-17