Freescale Semiconductor MPC8260 User Manual

Page 866

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Multi-Channel Controllers (MCCs)

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2

28-18

Freescale Semiconductor

Flow control

SS7 features are as follows:

Up to 128 independent communication channels (64 channels per MCC)

Independent mapping for receive and transmit

Standard HDLC features

— Flag/Abort/Idle generation/detection

— Zero insertion/deletion

— 16-bit CRC-CCITT generation/checking

— Detection of non-octet aligned signal units

— Programmable number of flags between signal units

Maintenance of signal unit error monitor (SUERM)

Maintenance of alignment error rate monitor (AERM)

Maintenance of separate counters for error-free and bad frames

Detection and stripping of long signal units

Discard of short signal units (less than 5 octets)

Transmission of signal units with a programmable delay (applies to JT-Q.703 standard)

Automatic transmission of fill-in signal units (FISU)

Automatic retransmission of signal units (for link-status signal unit (LSSU) retransmission)

Automatic discard of identical FISUs and LSSUs using a user-defined mask

Octet counting mode in case of long signal units and receiver overrun

Five circular interrupt tables with programmable size and overflow identification—one for
transmit and four for receive.

Global or individual channel loop modes

Efficient bus usage (no bus usage for inactive channels or for active channels with nothing to send)

Efficient control of interrupts to the CPU

Supports external BD tables

Uses on-chip dual-port RAM for parameter storage

Uses 64-bit data transactions for reading and writing data in BDs

Table 28-10

describes channel-specific parameters for SS7. Note that a given parameter location may have

a different definition depending on the standard used (ITU-T/ANSI or Japanese standard).

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