Freescale Semiconductor MPC8260 User Manual
Page 252
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External Signals
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
6-12
Freescale Semiconductor
L_A22
PCI_SERR
1
Local bus address 22—Local bus address bit 22 output pin. In the local address bus bit 14 is most
significant and bit 31 is least significant.
PCI system error—PCI system error input/output pin. Assertion of this pin indicates that a PCI
system error was detected during a PCI transfer. The PCI system error is for reporting address
parity errors, data parity errors on a special cycle command, or other catastrophic system errors.
L_A23
PCI_REQ0
1
Local bus address 23—Local bus address bit 23 output pin. In the local address bus bit 14 is most
significant and bit 31 is least significant.
PCI arbiter request 0—PCI request 0 input/output pin. When the PowerQUICC II’s internal PCI
arbiter is used, this is an input pin. In this mode assertion of this pin indicates that an external PCI
device is requesting the PCI bus. When an external PCI arbiter is used, this is an output pin. In
this mode assertion of this pin indicates that the PowerQUICC II’s PCI interface is requesting the
PCI bus.
L_A24
PCI_REQ1
1
CPCI_HS_ES
1
Local bus address 24—Local bus address bit 24 output pin. In the local address bus bit 14 is most
significant and bit 31 is least significant.
PCI arbiter request 1—PCI request 1 input pin. When the PowerQUICC II’s internal PCI arbiter is
used, assertion of this pin indicates that an external PCI device is requesting the PCI bus.
CompactPCI Hot Swap Ejector Switch—Hot Swap Ejector Switch input pin. In a CompactPCI
system, when the PowerQUICC II’s internal PCI arbiter is not used, this pin is used for the Hot
Swap interface to connect to the ejector switch logic.
0 Switch is closed
1 Switch is open
Important note: When functioning as the CPCI_HS_ES input, this signal must be filtered
(debounced) by an external circuit. Do not connect this input directly to the ejector switch. The
input must be a monotonically rising/falling signal.
L_A25
PCI_GNT0
1
Local bus address 25—Local bus address bit 25 output pin. In the local address bus bit 14 is most
significant and bit 31 is least significant.
PCI arbiter grant 0—PCI grant 0 input/output pin. When the PowerQUICC II’s internal PCI arbiter
is used, this is an output pin. In this mode, assertion of PCI_GNT0 indicates that an the external
PCI device that requested the PCI bus with PCI_REQ0 is granted the bus. When an external PCI
arbiter is used, this is an input pin. In this mode, assertion of PCI_GNT0 indicates that the
PowerQUICC II’s PCI interface is granted the PCI bus.
L_A26
PCI_GNT1
1
CPCI_HS_LED
1
Local bus address 26—Local bus address bit 26 output pin. In the local address bus bit 14 is most
significant and bit 31 is least significant.
PCI arbiter grant 1—PCI grant 1 output pin. When the PowerQUICC II’s internal PCI arbiter is
used, assertion of PCI_GNT1 indicates that the external PCI device that requested the PCI bus
with PCI_REQ1 pin is granted the bus.
CompactPCI Hot Swap LED—Hot Swap LED output pin. In CompactPCI system, when the
PowerQUICC II’s internal PCI arbiter is not used, this pin is used for the Hot Swap interface to
connect to the Hot Swap LED. The Hot Swap pins are not available when the internal arbiter is
used.
0 LED is off
1 LED is on
Table 6-1. External Signals (continued)
Signal Description