Table 5-7. audio interfaces pin assignment -26 – Cirrus Logic EP93xx User Manual
Page 152

5-26
DS785UM1
Copyright 2007 Cirrus Logic
System Controller
EP93xx User’s Guide
5
5
5
I2SonAC97:
Audio - I
2
S on AC97 pins. The I
2
S block uses the AC97
pins. See Audio Interface pin assignments in
.
Note: The I
2
S should be enabled on only one set of pins. Therefore I2SonAc97 and I2SonSSP
are mutually exclusive. Setting both I2SonAc97 and I2SonSSP will cause unexpected
behavior.
I2SonSSP:
Audio - I
2
S on SSP pins. The I
2
S block uses the SSP pins.
MCLK is not available in this pin option. See Audio
Interface pin assignments in
Note: The I
2
S should be enabled on only one set of pins. Therefore I2SonAc97 and I2SonSSP
are mutually exclusive. Setting both I2SonAc97 and I2SonSSP will cause unexpected
behavior.
EonIDE:
GPIO Port E on IDE pins:
0 - GPIO Port E used for IDE
1 - GPIO Port E used for GPIO
PonG:
PWM 1 output on EGPIO pin
GonIDE:
GPIO Port G on IDE pins
0 - GPIO Port G used for IDE
1 - GPIO Port G used for GPIO
HonIDE:
GPIO Port H on IDE pins
Table 5-7. Audio Interfaces Pin Assignment
Pin
Name
Normal Mode
I
2
S on SSP
Mode
I
2
S on AC'97
Mode
Pin
Description
Pin Description
Pin Description
SCLK1
SPI Bit Clock
I
2
S Serial Clock
SPI Bit Clock
SFRM1
SPI Frame Clock
I
2
S Frame Clock
SPI Frame Clock
SSPRX1
SPI Serial Input
I
2
S Serial Input
SPI Serial Input
SSPTX1
SPI Serial Output
I
2
S Serial Output
SPI Serial Output
(No I
2
S Master
Clock)
ARSTn
AC'97 Reset
AC'97 Reset
I
2
S Master Clock
ABITCLK
AC'97 Bit Clock
AC'97 Bit Clock
I
2
S Serial Clock
ASYNC
AC'97 Frame
Clock
AC'97 Frame Clock
I
2
S Frame Clock
ASDI
AC'97 Serial
Input
AC'97 Serial Input
I
2
S Serial Input
ASDO
AC'97 Serial
Output
AC'97 Serial Output
I
2
S Serial Output