Linecarry, Eoloffset – Cirrus Logic EP93xx User Manual
Page 231
DS785UM1
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Copyright 2007 Cirrus Logic
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
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LineCarry
Address: 0x8003_003C
Default: 0x0000_0000
Definition: Horizontal Line Carry Value register
Bit Descriptions:
RSVD:
Reserved - Unknown during read
LCARY:
Line Carry - Read/Write
When the Horizontal down counter counts down to the
written LCARY value, a carry is sent to increment the
Vertical counter. This provides for timing skew between
the vertical and horizontal video signals. Please refer to
the video signalling timing diagrams in
EOLOffset
Address: 0x8003_0230
Default: 0x0000_0000
Definition: End-of-line Offset Register.
Bit Descriptions:
RSVD:
Reserved - Unknown during read
OFFSET:
Offset - Read/Write
The Offset value written to this field is added to the
address at the end of every other video line if the Offset
value is not 0x0. This allows splitting the left and right
halves of the display.
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RSVD
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0
RSVD
LCARY
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RSVD
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OFFSET