4 receive descriptor data/status flow, 4 receive descriptor data/status flow -23 – Cirrus Logic EP93xx User Manual
Page 325
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DS785UM1
9-23
Copyright 2007 Cirrus Logic
1/10/100 Mbps Ethernet LAN Controller
EP93xx User’s Guide
9
9
9
9.2.3.4 Receive Descriptor Data/Status Flow
Figure 9-10. Receive Descriptor Data/Status Flow
SoftWare
HardWare
[CS8950 + LAN]
SoftWare
Reset
Initialize
Rx Descriptor
and Status
Queues
Write RxDEQ
and RxSEQ
count
Idle
Load
Descriptors
Receive Frame 0
Receive Frame 1
Write RxDEQ
with additional
descriptor count
Random timing between
Write RxDEQ steps
Receive Frame 2
Write
Rx Status
Process Rx Status,
write RxSEQ
Load
Descriptors
Load
Descriptors
Write
Rx Status
Write
Rx Status
Process Rx Status,
write RxSEQ
Process Rx Status,
write RxSEQ
Write RxDEQ
with additional
descriptor count
Processor + LAN
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