Cirrus Logic EP93xx User Manual
Page 385
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DS785UM1
9-83
Copyright 2007 Cirrus Logic
1/10/100 Mbps Ethernet LAN Controller
EP93xx User’s Guide
9
9
9
0x0000_0000
Soft Reset:
Unchanged
Definition:
Transmit Status Queue Base Address. The Transmit Status Queue Base
Address defines the system memory address of the transmit status queue.
This address is used by the MAC to reload the Transmit Current Status
Address whenever the end of the status queue is reached. The base address
should be set at initialization time and must be set to a word aligned memory
address.
Bit Descriptions:
TSQBA:
Transmit Status Queue Base Address.
TXStsQBLen
Address:
0x8001_00C4 - Read/Write
Chip Reset:
0x0000_0000
Soft Reset:
Unchanged
Definition:
Transmit Status Queue Base Length. The Transmit Status Queue Base
Length defines the actual number of bytes in the transmit status queue. The
length should be set at initialization time and must define an integral number
of transmit statuses.
Bit Descriptions:
RSVD:
Reserved. Unknown During Read.
TSQBL:
Transmit Status Queue Base Length.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RSVD
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TSQBL