Avago Technologies LSI8751D - Manual (Page 252)

7-16 Instruction Set of the I/O Processor
Figure 7.10 PCI Configuration Register Write
Data In
Byte Enable
Addr In
t
2
t
1
t
2
t
1
t
2
t
1
t
1
t
2
t
2
t
3
t
2
t
1
t
3
t
2
t
1
CLK
(Driven by System)
FRAME/
(Driven by Master)
AD/
(Driven by Master)
C_BE/
(Driven by Master)
PAR
(Driven by Master)
IRDY/
(Driven by Master)
TRDY/
(Driven by LSI53C875)
STOP/
(Driven by LSI53C875)
DEVSEL/
(Driven by LSI53C875)
IDSEL
(Driven by Master)
t
1 t
2
CMD