Avago Technologies LSI8751D - Manual (Page 285)

PCI and External Memory Interface Timing Diagrams 7-49
Figure 7.30 Write Cycle, Slow Memory (
≤
64 Kbyte) (Cont.)
MAD
MAS2/
(Driven by LSI53C875)
MAS1/
(Driven by LSI53C875)
MAS0/
(Driven by LSI53C875)
MCE/
(Driven by LSI53C875)
MOE/
(Driven by LSI53C875)
CLK
10 11 12 13 14 15 16 17 18
MWE/
(Driven by LSI53C875)
t
24s
t
25
(Driven by LSI53C875)
t
20
t
23
19
Valid Write Data
t
22s
t
21
t
26