Avago Technologies LSI8751D - Manual (Page 280)

7-44 Instruction Set of the I/O Processor
Figure 7.27 Read Cycle, Normal/Fast Memory (
≥
64 Kbyte)
t
19
t
17
MAD
High Order
t
11
Data driven by memory)
MAS2/
(Driven by LSI53C875)
MAS1/
(Driven by LSI53C875)
MAS0/
(Driven by LSI53C875)
MCE/
(Driven by LSI53C875)
MOE/
(Driven by LSI53C875)
CLK
MWE/
(Driven by LSI53C875)
(Addr driven by LSI53C875;
Address
Low Order
Address
Valid Write Data
t
12
t
13
t
15f
t
14f
t
16f
t
18