Avago Technologies LSI8751D - Manual (Page 277)

PCI and External Memory Interface Timing Diagrams 7-41
Figure 7.25 Read Cycle, Slow Memory (
≥
64 Kbyte) (Cont.)
MAD
(Address driven by LSI53C875
Data driven by memory)
MAS2/
(Driven by LSI53C875)
MAS1/
(Driven by LSI53C875)
MAS0/
(Driven by LSI53C875)
MCE/
(Driven byLSI53C875)
MOE/
(Driven by LSI53C875)
CLK
11 12 13 14 15 16 17 18 19
MWE/
(Driven by LSI53C875)
20
t
13
t
15s
t
16s
Read Data
Valid
t
17
t
19
t
18
t
14s