On-screen display – Lucent Technologies MN10285K User Manual
Page 214
On-Screen Display
OSD Registers
MN102H75K/F75K/85K/F85K LSI User Manual
Panasonic Semiconductor Development Company
213
Panasonic
CPT0–CPTF: Text Palette Colors 0–15 Registers
x’007F80’–x’007F9E’
These registers contain the colors used in the text layer. When digital out-
put is selected, CPTnYM0 is output as YM, CPTnB0 as B, CPTnG0 as G,
and CPTnR0 as R. When the YS color palette is selected, CPTnYM3 is
output as YS.
CPTnYM[3:0]: YM color code
CPTnB[3:0]: Blue color code
CPTnG[3:0]: Green color code
CPTnR[3:0]: Red color code
COLB: Color Background Register
x’007FA0’
This register contains the color used for the color background. When digi-
tal output is selected, COLBYM0 is output as YM, COLBB0 as B,
COLBG0 as G, and COLBR0 as R. When the YS color palette is selected,
COLBYM3 is output as YS.
COLBYM[3:0]: YM color code
COLBB[3:0]: Blue color code
COLBG[3:0]: Green color code
COLBR[3:0]: Red color code
FRAME: Outlining and Character Shadowing Color Register
x’007FA2’
This register contains the color used for text outlining and shadowing.
When digital output is selected, FRAMEYM0 is output as YM,
FRAMEB0 as B, FRAMEG0 as G, and FRAMER0 as R. When the YS
color palette is selected, FRAMEYM3 is output as YS.
FRAMEYM[3:0]: YM color code
FRAMEB[3:0]: Blue color code
FRAMEG[3:0]: Green color code
FRAMER[3:0]: Red color code
Bit:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CPTn
YM3
CPTn
YM2
CPTn
YM1
CPTn
YM0
CPTn
B3
CPTn
B2
CPTn
B1
CPTn
B0
CPTn
G3
CPTn
G2
CPTn
G1
CPTn
G0
CPTn
R3
CPTn
R2
CPTn
R1
CPTn
R0
Reset:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W:
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
Bit:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
COLB
YM3
COLB
YM2
COLB
YM1
COLB
YM0
COLB
B3
COLB
B2
COLB
B1
COLB
B0
COLB
G3
COLB
G2
COLB
G1
COLB
G0
COLB
R3
COLB
R2
COLB
R1
COLB
R0
Reset:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W:
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
Bit:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
FRAM
E
YM3
FRAM
E
YM2
FRAM
E
YM1
FRAM
E
YM0
FRAM
E
B3
FRAM
E
B2
FRAM
E
B1
FRAM
E
B0
FRAM
E
G3
FRAM
E
G2
FRAM
E
G1
FRAM
E
G0
FRAM
E
R3
FRAM
E
R2
FRAM
E
R1
FRAM
E
R0
Reset:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W:
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W