Interrupts, I2cicl detects and requests i, No interrupt requested 1: interrupt requested – Lucent Technologies MN10285K User Manual
Page 72: Interrupt undetected 1: interrupt detected, I2cich enables i, Disable 1: enable
Interrupts
Interrupt Control Registers
MN102H75K/F75K/85K/F85K LSI User Manual
Panasonic Semiconductor Development Company
71
Panasonic
I2CICL: I
2
C Interrupt Control Register (Low)
x’00FC9C’
I2CICL detects and requests I
2
C interrupts. It is an 8-bit access register.
Use the MOVB instruction to access it.
I2CIR: I
2
C interrupt request flag
0: No interrupt requested
1: Interrupt requested
I2CID: I
2
C interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
I2CICH: I
2
C Interrupt Control Register (High)
x’00FC9D’
I2CICH enables I
2
C interrupts. It is an 8-bit access register. Use the
MOVB instruction to access it.
The priority level for I
2
C interrupts is written to the SCT1LV[2:0] field of
the SCT1ICH register.
I2CIE: I
2
C interrupt enable flag
0: Disable
1: Enable
Bit:
7
6
5
4
3
2
1
0
—
—
—
I2C
IR
—
—
—
I2C
ID
Reset:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R/W
R
R
R
R
Bit:
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
I2C
IE
Reset:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
R
R/W