Interrupts, Sets the priority from 0 to 6, Disable 1: enable – Lucent Technologies MN10285K User Manual
Page 51: No interrupt requested 1: interrupt requested, Interrupt undetected 1: interrupt detected, Iq0ie: external interrupt 0 interrupt enable flag, Iq1ir: external interrupt 1 interrupt request flag, Iq1id: external interrupt 1 interrupt detect flag, Iq1ie: external interrupt 1 interrupt enable flag
Interrupts
Interrupt Control Registers
Panasonic Semiconductor Development Company
MN102H75K/F75K/85K/F85K LSI User Manual
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Panasonic
IQ0ICH: External Interrupt 0 Interrupt Control Register (High)
x’00FC49’
IQ0ICH sets the priority level for and enables external interrupt 0. It is an
8-bit access register. Use the MOVB instruction to access it.
IQ0LV[2:0]: External interrupt 0 interrupt priority level
Sets the priority from 0 to 6.
IQ0IE: External interrupt 0 interrupt enable flag
0: Disable
1: Enable
IQ1ICL: External Interrupt 1 Interrupt Control Register (Low)
x’00FC4A’
IQ1ICL requests and verifies interrupt requests for external interrupt 1. It
is an 8-bit access register. Use the MOVB instruction to access it.
IQ1IR: External interrupt 1 interrupt request flag
0: No interrupt requested
1: Interrupt requested
IQ1ID: External interrupt 1 interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
IQ1ICH: External Interrupt 1 Interrupt Control Register (High)
x’00FC4B’
IQ1ICH enables external interrupt 1. It is an 8-bit access register. Use the
MOVB instruction to access it.
The priority level for external interrupt 1 is written to the IQ0LV[2:0] field
of the IQ0ICH register.
IQ1IE: External interrupt 1 interrupt enable flag
0: Disable
1: Enable
Bit:
7
6
5
4
3
2
1
0
—
IQ0LV2 IQ0LV1 IQ0LV0
—
—
—
IQ0IE
Reset:
0
0
0
0
0
0
0
0
R/W:
R
R/W
R/W
R/W
R
R
R
R/W
Bit:
7
6
5
4
3
2
1
0
—
—
—
IQ1IR
—
—
—
IQ1ID
Reset:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R/W
R
R
R
R
Bit:
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
IQ1IE
Reset:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
R
R/W